Product Features Datasheet Enhanced IP Protocol Support — TCP, UDP, IPv4 checksum offload — Received checksum verification Quality of Service (QoS) — Multiple priority transmit queues Optimum Integration for Lowest Cost Solution — Integrated IEEE 802.3 10BASE-T and 100BASE-TX compatible PHY — 32-bit PCI master interface 2 — Thin BGA 15mm package Integrated power management functions — ACPI and PCI power management standards compliance — Wake on “interesting” packets and link status change support PHY detects polarity, MDI-X, and cable lengths. Auto MDI, MDI-X crossover at all speeds XOR tree mode support High Performance Networking Functions — Early release — 8255x controller family chained memory structure — Improved dynamic transmit chaining with multiple priorities transmit queues — Full pin compatibility with the 82559 and 82559ER controllers — Backward compatible software to 8255xER controllers — Full duplex support at 10 and 100 Mbps — IEEE 802.3u auto-negotiation support — 3 KB transmit and receive FIFOs — Fast back-to-back transmission support with minimum interframe spacing — IEEE 802.3x 100BASE-TX flow control support — Adaptive Technology Low Power Features — Advanced Power Management (APM) capabilities — Low power 3.3 V device — Efficient dynamic standby mode — Deep power-down support — Clockrun protocol support 82551IT Enhancements — Wider operating temperature range — Improved bit error rate performance — HWI support — Deep power-down state power reduction 1 Lead-free 196-pin Ball Grid Array (BGA). Devices that are lead-free are marked with a circled “e1” and have the product code: LUxxxxxx. 1 This device is lead-free. That is, lead has impurity at <1000 ppm. The Material concentration of other Restriction on In addition, this device has been tested and versions of the device. For more information regarding lead-free representative. not been intentionally added, but lead may still exist as an Declaration Data Sheet, which includes lead impurity levels and the Hazardous Substances (RoHS)-banned materials, is available at: ftp://download.intel.com/design/packtech/material_content_IC_Package.pdf#pagemode=bookmarks conforms to the same parametric specifications as previous products from Intel Corporation, contact your Intel Field Sales 317801-004 Revision 4.1 Revision History Revision Date Oct 2003 Sep 2004 Nov 2004 Jan 2005 April 2005 July 2005 Oct 2006 Feb 2007 Sept 2007 Sept 2007 March 2008 Nov 2008 Revision 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 • • • • • • • • • • • • • • • • • • • • • • Description Initial draft for release (non-classified). Added references to the MDI/MDI-X feature. Added lead-free information. Removed EEPROM Map bit descriptions. These descriptions can now be found in the 82551QM/ER/IT EEPROM Map and Programming Information. Added 82551IT Test Port Functionality (Chapter 10). Added new values for RBIAS100 and RBIAS10. RBIAS100 = 649 and RBIAS10 = 619 . Removed all references to the 82551ER and 82551QM controllers. 82551ER and 82551QM information can now be found in their respective datasheets. Updated the section describing “Multiple Priority Transmit Queues”. Updated the section describing “VLAN Support”. Added information about Read the full 82551IT Fast Ethernet PCI Controller Networking Silicon - 82551IT.