See the performance improvement of parallel computing with code optimized to take advantage of the multiple cores of modern Intel® processors.
Shows how parallel computing offers a massive performance improvement with code optimized to take advantage of the multiple cores, threads, and wide vector units of modern Intel® architecture-based processors, such as the Intel® Xeon Phi™ processor.
Guide: Describes Intel® Xeon Phi™ coprocessor safety and compliance standards for system installation, including grounding and cooling requirements.
Guide: Describes Intel® Xeon Phi™ coprocessor safety and compliance standards for host system installation, including warnings for grounding, cooling requirements, thermal injuries, electrostatic discharge, and electromagnetic interference.
User Guide: Describes Intel® Xeon Phi™ coprocessor software configuration tools, including check utility, flash, information, and RAS daemon.
User Guide: Describes Intel® Xeon Phi™ coprocessor software configuration tools, including check utility (miccheck), flash (micflash), information (micinfo), and RAS daemon (micrasd).
Demonstrates installation of the Intel® Xeon Phi™ coprocessor card, showing where it connects inside the server sled of the Dell PowerEdge C8220XP*.
Intel’s Mark Rogers demonstrates installation of the Intel® Xeon Phi™ coprocessor card into the Dell PowerEdge C8220X*, showing how to open the server sled, separate it in two, and where to connect the coprocessor unit.Full View >
Intel® Xeon Phi™ coprocessors are a performance-efficient solution for rapidly porting applications to the platform and supporting parallel workloads.
Intel’s John Hengeveld describes Intel® Xeon Phi™ coprocessors, which provide a performance-efficient solution for rapidly porting applications to the platform and supporting workloads with a high degree of parallelism.Full View >
TACC describes their efforts in combining the Intel® Xeon Phi™ coprocessor with the new Stampede* supercomputer at Supercomputing 2012.
The Texas Advanced Computing Center (TACC) describes their efforts in the development of Intel® Xeon Phi™ coprocessor applications, the new Stampede* supercomputer, and testing their combined capabilities at Supercomputing 2012.Full View >
Optimize code and maximize utilization using Intel® Xeon Phi™ coprocessors, enabling research and discovery with highly parallel applications.
NAG’s Mike Dewar discusses how porting legacy code to Intel® Xeon Phi™ coprocessors enables users to solve large data problems quickly.