dbgreset

         
      
Module Instance Base Address Register Address
i_io48_hmc_mmr_io48_mmr 0xFFCFA000 0xFFCFA0F8

Offset: 0xF8

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

counter_one_reset

0x0

counter_zero_reset

0x0

dbgreset Fields

Bit Name Description Access Reset
1 counter_one_reset
Used for performance monitoring. Writing to this register resets the second counter. Note that this bit auto-clears after one clock cycle.
RW 0x0
0 counter_zero_reset
Used for performance monitoring. Writing to this register resets the first counter. Note that this bit auto-clears after one clock cycle.
RW 0x0