Generation 10
Overview
Intel® Arria® 10 and Intel® Stratix® 10 FPGAs and SoC FPGAs are the industry's first programmable devices with hardened floating-point DSP blocks capable of up to 1.5 tera floating-point operations per second (TFLOPS) and 10 TFLOPS single-precision IEEE 754 performance, respectively. The variable-precision digital signal processing (DSP) block with hardened floating-point operators provide different processing capabilities, ranging from 18x19, 27x27, and floating-point operations.
- Learn more about the new DSP block with hardened floating-point operators
- View the Intel® Arria® 10 Device Handbook
- Webcast: Accelerating Design Development Time with Hardened Floating-Point DSP Blocks in FPGAs
- White Paper: Understanding Peak Floating-Point Performance Claims
Intel® FPGA's DSP solutions puts you on the fastest path to the highest performance signal processing. The solutions consist of:
- Variable-precision DSP architecture with hardened floating-point operators, delivering precision and performance that you can configure at compile time for your application
- DSP Builder for Intel® FPGAs Advanced Blockset, automatically creating fMAX and latency-optimized netlists from MATLAB*/Simulink design descriptions
- Complete 1080p video design framework, including our Video and Image Processing Suite of intellectual property (IP) cores
- Comprehensive floating-point IP cores, that include functions ranging from addition, subtraction, and inversion, to floating-point fast Fourier transforms (FFTs)
- High-performance floating-point DSP solutions, including Intel® FPGA's model-based tool flow using DSP Builder for Intel® FPGAs Advanced Blockset to resolve floating-point design challenges
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