BCH Intel® FPGA IP Core

The Bose, Chaudhuri, and Hocquenghem (BCH) error correction intellectual property (IP) core is typically used in NAND flash applications. The BCH Intel FPGA IP core is often used as a companion code with other forward error correction (FEC) IP cores, such as the Reed-Solomon and low-density parity-check (LDPC) IP cores.

Read the BCH Intel FPGA IP user guide ›

BCH Intel® FPGA IP Core

Features

The BCH Intel FPGA IP core has the following features:

  • Encoder and decoder
  • Fully parameterizable:
  • Number of symbols per codeword
  • Number of check symbols per codeword
  • Number of parallel input bits

Additional Resources

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Technical Support

For technical support on this IP core, please visit Support Resources or Intel® Premier Support. You may also search for related topics on this function in the Knowledge Center and Communities.

IP Evaluation and Purchase

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Designing with Intel® FPGA IP

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IP Base Suite

Free Intel FPGA IP Core licenses with an active license for Intel® Quartus® Prime Standard or Pro Edition Software.

I-Tested

Intel awards the interoperability-tested or I-Tested certification to verified Intel FPGA IP or Intel FPGA Design Solutions Network member IP cores.

Intel® FPGA Partner IP

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Design Examples

Download design examples and reference designs for Intel® FPGA devices.

IP Certifications

Intel is committed to providing Intellectual Property cores that work seamlessly with Intel® FPGA tools or interface specifications.

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