The TMO Intel FPGA IP modifies the contrast of a video stream to improve visibility in a wide variety of applications, such as medical imaging, video conferencing, daylight projection, security cameras, and machine vision. The IP is tile-based to take account of local exposure variations, improving the visibility of latent image detail to enhance and ease the overall viewing experience. The TMO IP core accepts RGB-format video input as an AXI4-Stream, statistically analyzes the image luminance (locally and globally) and dynamically adjusts image components to improve overall image contrast. These operations enhance underexposed and overexposed imagery to fully utilize the available dynamic range. The TMO IP requires an external processor, such as the Nios® II processor FPGA softcore, to allow configuration of TMO IP blocks and take measurements via the register bus.
Multi-tile local image statistics analysis
Support for 8, 10 and 12 bit per color component
Support up to 4 pixels in parallel per clock processing
Low subframe latency (~ 100 clock cycles)
Support resolutions up to 4K at 60 fps on Intel® C10/A10/S10 FPGAs and up to 8K at 60 fps on Intel® Agilex™FPGAs
The Intel® FPGA design services team have developed a pool of expertise and a wealth of intellectual property (IP) to solve customer design challenges in the areas of intelligent video and vision processing. Our experienced and skilled designers are motivated to meet your design needs with the most efficient and innovative solutions, using our library of highly optimized and proven IP. We cover a wide variety of applications ranging from high-volume consumer electronics to mid-volume specialist design in markets including—but not limited to—medical imaging, ProAV, industrial, military, and broadcast.