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CPRI Intel® FPGA IP

The Common Public Radio Interface (CPRI) Intel FPGA IP core implements the CPRI Specification V7.0. CPRI is a high-speed serial interface for network radio equipment controllers (REC) to receive data from and provide data to remote radio equipment (RE). The IP core targets high-performance, remote radio network applications. You can configure the CPRI Intel FPGA IP core as an RE or an REC.

Read the CPRI Intel FPGA IP user guide ›

Read the F-Tile CPRI PHY Intel® FPGA IP user guide ›

Read the E-tile Hard IP user guide ›

CPRI Intel® FPGA IP

  • Overview

Typical CPRI Application on Intel FPGA Devices

Features

  • Compliant with the Common Public Radio Interface (CPRI) Specification v7.0 (2015-10-09) Interface Specification.
  • Supports radio equipment controller (REC) and radio equipment (RE) module configurations.
  • Configurable CPRI line bit rate auto-rate negotiation support using Intel FPGA on-chip high-speed transceivers.
  • Configurable and runtime programmable synchronization mode: host port or agent port on a CPRI link.
  • Transmitter (Tx) and receiver (Rx) deterministic latency and delay measurement and calibration. Note: Compliant with the CPRI Specification requirements R-19, R-20, R-20A, R-21, and R-21A.
  • Configurable CPRI communication line bit rate (to 0.6144, 1.2288, 2.4576, 3.0720, 4.9152, 6.144, 8.11008, 9.8304, 10.1376, 12.16512 or 24.33024 Gbps) using Intel FPGA on-chip high-speed transceivers.

IP Status

 
Status Production
Ordering Codes
CPRI Intel® FPGA IP IP-CPRI-V7
F-Tile CPRI PHY Intel® FPGA IP  IP-CPRI-v7-E-PHY
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Related Links

Documentation

  • The emerging need for fronthaul compression white paper

Device Support

  • Intel Agilex® 7 FPGA
  • Intel® Stratix® 10 FPGA
  • Intel® Arria® 10 FPGA
  • Arria V GX/GT/GZ FPGAs
  • Cyclone V GX/GT FPGAs
  • IDT CPRI compression IP (Partner page)

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