The Intel® Stratix® 10 FPGA H-Tile Hard IP for Ethernet Intel® FPGA intellectual property (IP) core provides access to this hard IP at Ethernet data rates of 100 Gbps. The IP core is included in the Intel® FPGA IP library and is available from the Intel® Quartus® Prime Pro Edition software IP catalog. The IP core is available with a 100GBASE-R4 Ethernet channel. For the Ethernet data rate, you can choose a media access control (MAC) + physical coding sublayer (PCS) variation or a PCS-only variation.
The 100GBASE-R4 Ethernet channel maps to four 25.78125 Gbps links. The FPGA serial transceivers are compliant with the IEEE 802.3-2015 High Speed Ethernet Standard CAUI-4 specification. The IP core configures the transceivers to implement the relevant specification for your IP core variation. You can connect the transceiver interfaces directly to an external physical medium dependent (PMD) optical module or to another device.