High Definition Audio Specification Revision 1.0a
June 17, 2010
Revision History
Revision 1.0 1.0a
Purpose Initial Release
Updated with DCN No: HDA001-A changes.
Updated with DCN No: HDA002-A changes.
Updated with DCN No: HDA006-A changes.
Updated with DCN No: HDA011-A changes.
Updated with DCN No: HDA012-A changes.
Updated with DCN No: HDA015-B changes.
Updated with DCN No: HDA016-A changes.
Updated with DCN No: ...HDA017-A changes.
Updated with DCN No: HDA019-A changes.
Updated with DCN No: HDA022-A changes.
Updated with DCN No: HDA024-A changes.
Updated with DCN No: HDA034-A2 changes.
Updated with DCN No: HDA035-A changes.
Updated with DCN No: HDA036-A changes.
Updated with DCN No: HDA039-A changes.
Updated with DCN No: HDA041-A changes.
Updated with DCN No: HDA042-A changes.
Errata: Clarified Input Payload Capability and Output Payload
Capability Reset value is implementation specific.
Clarified that Stream Descriptor n FIFO Size must be valid
and static after every programming of data format register,
as well as when RUN bit is set.
Clarified that Stream Descriptor n BDL Pointer Upper Base
Address register attribute is RO if not supporting 64 bit
addressing.
Fixed timing error in “Codec Discovery” section that SW
should wait for at least 521 us (25 frames) after reading
CRST# as „1‟ before accessing codec.
Strongly recommend the default value for EAPD to be „1‟ in
“EAPD/BTL Enable” section.
Clarified the codec response expected for double Function
Group reset command in D3cold state, but recommended
no response for the first Function Group reset of the double
Function Group reset command sequence.
Clarified the reset value for FIFOS register is
implementation specific.
Clarified UR enable verb for function group node is
conditional in the required support for verbs table.
Date April 15, 2004
June 17, 2010
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Copyright © 2003-2010, Intel Corporation. All rights reserved.
Rev. 1.0a
High Definition Audio Specification
Contents
1 Introduction .................................................................................................. 16
1.1 Scope and Layout of This Document .......................................................................... 16
1.2 Motivation and Goals .................................................................................................. 16
1.2.1 AC„97 Compatibility ...................................................................................... 17
1.2.2 Feature List .................................................................................................. 17
1.2.3 Related Documents ...................................................................................... 17
2 Architecture Overview ................................................................................. 18
2.1 Hardware System Overview ....................................................................................... 18
2.2 Streams and Channels ............................................................................................... 19
2.3 DMA Channel Operation ............................................................................................ 21
2.4 Initialization
Read the full High Definition Audio Specification
Revision 1.0a.