No. When the PCI Express hard IP block is enabled, the number of other tranceiver channels available depends on the options selected in the PCI Express Compiler wizard. However, the Quartus® II software versions 8.1 and earlier incorrectly restrict the number of channels available when PCI Express hard IP block is enabled. For correct information on which transceiver channels are available, refer to Table 3-7 in the Configuring Multiple Protocols and Data Rates (PDF) chapter in volume 2 of the Stratix® IV Device Handbook.
This problem is scheduled to be fixed in the next release of the Quartus II software.