Article ID: 000074497 Content Type: Troubleshooting Last Reviewed: 09/12/2012

Is ASI IP support Cyclone IV EP4CGX22?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

According to the ASI user guide, the EP4CGX15 and EP4CGX30 are not supported. Due to the EP4CGX22 is a virtual device of EP4CGX30, so EP4CGX22 is not supported ASI IP as well.

 

You will receive the following error when compile the ASI IP in EP4CGX22.

 

Error: Internal TX PCS frequency and/or PLD clock limitation is violated when the effective data rate has a value of '1350.0 Mbps' on the node 'tr_asi_tx:tr_asi_tx_inst|asi_megacore_top:asi_megacore_top_inst|asi_transmit:asi_tx_gen.u_tx|c4gxb_tx_1port_1350_10bit:u_c4gxb_tx.u_gxb|alt_c3gxb:alt_c3gxb_component|alt_c3gxb_6hj4:auto_generated|transmit_pma0'.  The current TX channel settings are as follows: the Serializer divide-by factor has a value of '10', the Protocol Hint has a value of 'basic', the Use Double Data Mode has a value of 'false', and the Enable PCI-Express Hard IP (HIP) has a value of 'false' on the node 'tr_asi_tx:tr_asi_tx_inst|asi_megacore_top:asi_megacore_top_inst|asi_transmit:asi_tx_gen.u_tx|c4gxb_tx_1port_1350_10bit:u_c4gxb_tx.u_gxb|alt_c3gxb:alt_c3gxb_component|alt_c3gxb_6hj4:auto_generated|transmit_pcs0'.

Resolution

We will update the ASI user guide to state that the EP4CGX22 is not supported.

Related Products

This article applies to 1 products

Cyclone® IV GX FPGA