You may see the DDR2/DDR3 SDRAM UniPHY based Controller has “Maximum Avalon®-MM burst length” options {1, 3, 7, 15, 31, 63, 127, 255, 511, 1023, 2047}.
While Avalon-MM Pipeline Bridge has “Maximum burst size (words)” options {1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024} in Quartus® II software version 11.1SP2.
The “Maximum Avalon-MM burst length” value choices in DDR2/DDR3 SDRAM UniPHY based Controller is incorrect.
The actual maximum burst length implied by the “Maximum Avalon-MM burst length” options in DDR2/DDR3 SDRAM UniPHY based Controller is shown below:
1 -> 1
3 -> 2
7 -> 4
15 -> 8
31 -> 16
63 -> 32
127 -> 64
255 -> 128
511 -> 256
1,023 -> 512
2,047 -> 1,024