Article ID: 000079622 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does my single-port ROM megafunction implemented in Cyclone M4K behave differently than the same ROM implemented in Cyclone II M4K?

Environment

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Description

For Cyclone® devices, a single-port ROM megafunction implemented in M4K memory always uses a clock enable for port A input and output registers. This is true even if the Use clock enable for port A input registers and Use clock enable for port A output registers options are disabled in the MegaWizard™ Plug-In Manager. This is specific to the Cyclone M4K memory.

For Cyclone II devices, if these option are disabled, there is no clock enable for the port A input and output registers. This results in a difference in implementation between the two device families when this option is disabled.

To make a Cyclone II M4K single-port ROM megafunction behave the same as a Cyclone M4K megafunction, enable both the options Use clock enable for port A input registers and Use clock enable for port A output registers. To set these options, click More Options... next to the option Create one clock enable signal for each clock signal. Note: All registered ports are controlled by the enable signal(s).

Related Products

This article applies to 2 products

Cyclone® II FPGA
Cyclone® FPGAs