CLKLK_ENA
) to reset, or else the PLL may not lock onto the incoming clock. When you use internal feedback, this step is not necessary.
If you do not want your system to have to reset the PLL, use the optional open-drain INIT_DONE
pin and connect it to the CLKLK_ENA
pin. During configuration, INIT_DONE
will be low, resetting the PLL. After configuration and initialization, INIT_DONE
is released and pulled high, enabling PLL operation. If you want to retain control over the CLKLK_ENA
pin, you can take advantage of the fact that INIT_DONE
is an open-drain pin and controls the CLKLK_ENA
pin with another open-drain output signal.