Description
Due to a problem in the Quartus® II software version 13.0sp1 and earlier you may find the initial content of Arria® V M10K memory blocks to be incorrect in hardware.
The problem is specific to cases where two single-port RAM blocks are packed into a single M10K resource where both RAM blocks have constant (VCC or GND) read or write enables.
Resolution
Connect the read and write enable signals to dynamic signals so that they are not tied to VCC or GND.
This is scheduled to be fixed in a future version of the Quartus II software.
