Article ID: 000080627 Content Type: Troubleshooting Last Reviewed: 01/10/2023

Error(332000): can't read "pll_instance_name": no such variable

Environment

  • Intel® Quartus® Prime Pro Edition
  • Memory Interfaces and Controllers
  • LVDS SERDES Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 17.1 and earlier, you may see this error message when compiling a design that includes the LVDS IP.

    This problem occurs when the IP is in external PLL mode and targets an Intel Stratix® 10 device.

    Resolution

    To work around this problem, comment out the following line from the LVDS IP SDC file

    set_max_delay_in_fit_or_false_path_in_sta_through_no_warn ${pll_instance_name}|lock $max_delay

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs