Article ID: 000081058 Content Type: Error Messages Last Reviewed: 08/07/2023

Error: top.pcie_sv_hip_avmm_0: "RX buffer credit allocation - performance for received requests" (rxbuffer_rxreq_hwtcl) "High" is out of range: "Minimum", "Low", "Balanced"

Environment

  • Quartus® II Subscription Edition
  • Avalon-MM Arria® V Hard IP for PCI Express Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The above error will be seen when upgrading the Avalon-MM Hard IP for PCI®Express from an older Quartus® II version to v14.0 and later if "RX buffer credit allocation" is set to 'High' or 'Maximum'?

     

    For Avalon-MM Hard IP for PCI Express in Quartus II v14.0 and later versions, the 'High' and 'Maximum' settings of 'Rx Buffer Credit Allocation' are no longer available.

    Resolution

    Choose 'Balanced,' which is the closest to your previous setting.

    Related Products

    This article applies to 7 products

    Cyclone® V GT FPGA
    Stratix® V GX FPGA
    Cyclone® V GX FPGA
    Stratix® V GT FPGA
    Arria® V GX FPGA
    Arria® V GZ FPGA
    Arria® V GT FPGA