Article ID: 000082863 Content Type: Error Messages Last Reviewed: 04/20/2015

Internal Error: Sub-system: EMIF, File: /quartus/periph/emif/emif_gen6.cpp, Line: 832

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® II software version 14.1 and earlier, you may see this internal error when you use an IOPLL cascade output as the reference clock source for an EMIF IOPLL. This problem only occurs in Arria® 10 devices where the configuration is not supported.

    Resolution

    To avoid this internal error, do not implement this unsupported configuration.

    Future versions of the Quartus II software are scheduled to generate an error message when an IOPLL cascade output is used as the reference clock source an EMIF IOPLL. 

    Related Products

    This article applies to 3 products

    Intel® Arria® 10 GX FPGA
    Intel® Arria® 10 GT FPGA
    Intel® Arria® 10 SX SoC FPGA