Article ID: 000084348 Content Type: Product Information & Documentation Last Reviewed: 08/27/2013

How can I generate the VHDL simulation model for the intr_capturer component in the SoC Golden Hardware Reference Design (GHRD)?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The Quartus® II software versions 13.0 and 13.0sp1 provide the capability to generate VHDL models for Qsys system components.  However the VHDL simulation models for the Interrupt Capturer custom component provided with the SoC GHRD cannot be generated.

    Resolution

    To work around this issue in the Quartus II software version 13.0 and 13.0sp1, replace the intr_capturer_hw.tcl file in your GHRD project with the following file.

    intr_capturer_hw.tcl

    This issue will be fixed in future software version.

    Related Products

    This article applies to 1 products

    Cyclone® V SE SoC FPGA

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