Description
In the Intel® Quartus® Prime Pro Edition Software version 19.1, this error may be seen in designs that target an Intel® Stratix® 10 SX SoC FPGA device when the HPS_OSC_CLK pin is shared between the FPGA fabric and the Hard Processor System Intel® Stratix® 10 FPGA IP.
Resolution
To work around this problem, do not connect any FPGA fabric logic to this pin. The HPS_OSC_CLK pin usage is limited to the Hard Processor System Intel® Stratix® 10 FPGA IP.