The error "Error: can't read "rp_generated_name": no such variable" will be observed when generating the F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example using the Intel® Quartus® Prime Pro Edition Software version 22.1.
The error is caused by attempting to generate the design example with Example Design Files "Synthesis" option enabled, but the "Simulation" option not enabled.
To work around this problem ensure that both Simulation and Synthesis options are enabled before clicking the "Generate Example Design" button.
This problem will be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.