10 Gbps Ethernet IP Core Resource Center
Intel provides extensive support for the 10 Gbps Ethernet (10GbE) media access control (MAC) Megacore function to help you quickly and easily develop and debug 10GbE applications such as line cards, network interface cards (NICs), and switches operating at 10 gigabits per second (Gbps).
Reference Designs
AN 638-10-Gbps Ethernet MAC and XAUI PHY Interoperability Hardware Demonstration Reference Design
- Stratix® IV Development Kit
- ACDS 11.0 ACDS 12.0 SP2 ›
- Stratix® V Development Kit
- ACDS 12.0 SP2 ›
Note: For Stratix V device design compiled prior to ACDS 13.0, if you regenerate ETH10G.qsys file and encounter fitter error due to bonded channel placement, please follow the instruction below before you compile the design:
- Search for the file altera_xcvr_xaui in Qsys folder ./ETH10G_TOP/synthesis/submodules
- Search for the module sv_xcvr_xaui in the above file
- Edit the bonded mode parameter:
- Before: xN
- After: fb_compensation
Design Examples
Knowledge Database
The Knowledge Database provides support solutions, answers frequently-asked questions, and information about known issues regarding the 10GbE reference design.
See frequently-viewed solutions:
Online Training Courses
Development Kits
The following development kits are available for the 10GbE reference design: