HDMI Arria® 10 FPGA IP Design Example User Guide

ID 683156
Date 4/29/2024
Public
Document Table of Contents

3.1. HDMI 2.0 RX-TX Retransmit Design Block Diagram

The HDMI 2.0 RX-TX retransmit design example demonstrates parallel loopback on simplex channel mode for HDMI Intel® FPGA IP.
Figure 20. HDMI RX-TX Retransmit Block Diagram ( Quartus® Prime Pro Edition)
Figure 21. HDMI RX-TX Retransmit Block Diagram ( Quartus® Prime Standard Edition)