BCH IP Core: User Guide

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ID 683320
Date 2/13/2017
Public
Document Table of Contents
Document Table of Contents x
1. About the BCH IP Core 2. BCH IP Core Getting Started 3. BCH IP Core Functional Description 4. Document Revision History A. BCH IP Core Document Archive
1. About the BCH IP Core x
1.1. Intel® DSP IP Core Features 1.2. BCH IP Core Features 1.3. DSP IP Core Device Family Support 1.4. BCH IP Core Release Information 1.5. DSP IP Core Verification 1.6. BCH IP Core Performance and Resource Utilization
2. BCH IP Core Getting Started x
2.1. Installing and Licensing IP Cores 2.2. IP Catalog and Parameter Editor 2.3. Generating IP Cores ( Intel® Quartus® Prime Pro Edition) 2.4. Simulating Intel FPGA IP Cores 2.5. DSP Builder for Intel® FPGAs Design Flow
2.1. Installing and Licensing IP Cores x
2.1.1. OpenCore Plus IP Evaluation 2.1.2. BCH IP Core OpenCore Plus Timeout Behavior
2.3. Generating IP Cores ( Intel® Quartus® Prime Pro Edition) x
2.3.1. IP Core Generation Output ( Intel® Quartus® Prime Pro Edition)
3. BCH IP Core Functional Description x
3.1. BCH IP Core Encoder 3.2. BCH IP Core Decoder 3.3. BCH IP Core Parameters 3.4. BCH IP Core Interfaces and Signals
3.4. BCH IP Core Interfaces and Signals x
3.4.1. Avalon-ST Interfaces in DSP IP Cores
1. About the BCH IP Core
2. BCH IP Core Getting Started
3. BCH IP Core Functional Description
4. Document Revision History
A. BCH IP Core Document Archive

1.6. BCH IP Core Performance and Resource Utilization

Typical expected performance for a BCH IP Core using the Quartus Prime software with the Arria V (5AGXFB3H4F35C5), Cyclone V (5CGXFC7C7F23C8), and Stratix V (5SGXEA7H3F35C3) devices. Where m is the number of bits per symbol; n is the codeword length; d is the parallel data input width; t is the error correction capability.
Table 3.  Decoder Performance and Resource Utilization
Device Parameters Memory ALM Registers fMAX (MHz)
m n d t M10K M20K Primary Secondary
Arria V 8 255 10 42 7 -- 18,376 40,557 3,441 196
Cyclone V 8 255 10 42 7 -- 18,264 40,709 3,266 150
Stratix V 8 255 10 42 -- 7 19,027 44,134 4,315 308
Arria V 8 255 12 42 9 -- 22,293 49,602 4,053 186
Cyclone V 8 255 12 42 9 -- 22,243 49,243 4,511 149
Stratix V 8 255 12 42 -- 8 23,187 53,800 5,207 310
Arria V 8 255 2 42 4 -- 5,539 13,238 788 207
Cyclone V 8 255 2 42 4 -- 5,527 13,174 857 174
Stratix V 8 255 2 42 -- 4 6,088 14,399 850 369
Arria V 8 255 5 42 5 -- 10,231 23,321 1,554 206
Cyclone V 8 255 5 42 5 -- 10,234 23,391 1,551 164
Stratix V 8 255 5 42 -- 5 10,820 24,868 2,612 335
Stratix V 14 8784 10 20 18 7,358 15,082 761 346
Stratix V 14 8784 10 40 18 14,331 28,743 1,630 316
Stratix V 14 8784 10 80 18 28,383 56,292 3,165 281
Stratix V 14 8784 20 20 18 10,103 19,833 933 323
Stratix V 14 8784 20 40 18 20,012 37,413 1,747 304
Stratix V 14 8784 20 80 18 39,225 72,151 3,673 282
Stratix V 14 8784 30 20 17 11,784 23,924 844 329
Stratix V 14 8784 30 40 19 23,061 44,313 1,836 289
Stratix V 14 8784 30 80 19 43,949 85,476 3,398 263
Stratix V 14 8784 40 20 19 13,801 28,032 743 307
Stratix V 14 8784 40 40 19 26,107 51,680 1,472 291
Stratix V 14 8784 40 80 21 50,303 98,545 3,351 248
Stratix V 14 8784 50 20 20 16,407 33,020 967 307
Stratix V 14 8784 50 40 20 31,095 60,503 1,991 288
Stratix V 14 8784 50 80 22 58,690 116,232 3,222 249
Stratix V 14 8784 60 20 20 18,290 37,106 914 297
Stratix V 14 8784 60 40 20 35,041 67,183 2,324 292
Stratix V 14 8784 60 80 37 80,961 160,458 7,358 233
Stratix V 14 8784 70 20 20 20,494 41,471 545 286
Stratix V 14 8784 70 40 20 38,294 74,727 1,778 280
Stratix V 14 8784 70 80 38 88,040 173,311 7,769 232
Stratix V 14 8784 80 20 22 22,437 45,334 691 276
Stratix V 14 8784 80 40 22 42,256 82,173 1,363 285
Stratix V 14 8784 80 80 40 95,913 186,869 7,317 229
Table 4.  Encoder Performance and Resource Utilization
Device Parameters Memory ALM Registers fMAX (MHz)
m n d t M10K M20K Primary Secondary
Arria V 8 255 10 42 2 -- 337 592 0 243
Cyclone V 8 255 10 42 2 -- 339 592 0 166
Stratix V 8 255 10 42 -- 1 353 601 3 400
Arria V 8 255 12 42 2 -- 386 602 0 257
Cyclone V 8 255 12 42 2 -- 395 602 0 174
Stratix V 8 255 12 42 -- 1 391 614 0 400
Arria V 8 255 2 42 2 -- 219 547 12 275
Cyclone V 8 255 2 42 2 -- 219 556 3 197
Stratix V 8 255 2 42 -- 2 220 542 17 464
Arria V 8 255 5 42 2 -- 237 563 3 276
Cyclone V 8 255 5 42 2 -- 237 565 1 193
Stratix V 8 255 5 42 -- 1 260 573 0 400
Stratix V 14 8784 10 20 3 400 785 4 387
Stratix V 14 8784 10 40 3 613 1,348 1 380
Stratix V 14 8784 10 80 3 1,009 2,451 4 309
Stratix V 14 8784 20 20 3 775 849 1 373
Stratix V 14 8784 20 40 3 1,340 1,410 0 312
Stratix V 14 8784 20 80 3 2,222 2,515 1 242
Stratix V 14 8784 30 20 3 1,161 919 1 324.
Stratix V 14 8784 30 40 3 2,074 1,480 0 253
Stratix V 14 8784 30 80 3 3,583 2,580 2 224
Stratix V 14 8784 40 20 3 1,522 977 4 307
Stratix V 14 8784 40 40 3 2,789 1,541 0 249
Stratix V 14 8784 40 80 3 4,909 2,647 0 191
Stratix V 14 8784 50 20 4 1,926 1,042 9 295
Stratix V 14 8784 50 40 4 3,467 1,610 1 234
Stratix V 14 8784 50 80 4 6,297 2,714 3 182
Stratix V 14 8784 60 20 4 2,356 1,121 0 266
Stratix V 14 8784 60 40 4 3,824 1,680 1 229
Stratix V 14 8784 60 80 4 7,548 2,783 0 167
Stratix V 14 8784 70 20 4 2,595 1,184 2 273
Stratix V 14 8784 70 40 4 4,372 1,746 0 221
Stratix V 14 8784 70 80 4 8,321 2,850 2 169
Stratix V 14 8784 80 20 5 2,885 1,251 1 293
Stratix V 14 8784 80 40 5 5,163 1,812 0 220
Stratix V 14 8784 80 80 5 8,867 2,918 0 169
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