Intel® FPGA Download Cable User Guide

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ID 683076
Date 1/16/2024
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to Intel® FPGA Download Cable 2. Specifications for Intel® FPGA Download Cable 3. Using the Intel® FPGA Download Cable A. Additional Information B. Document Revision History for the Intel® FPGA Download Cable User Guide
1. Introduction to Intel® FPGA Download Cable x
1.1. Intel® FPGA Download Cable Revision 1.2. Supported Devices and Host Systems
2. Specifications for Intel® FPGA Download Cable x
2.1. Block Diagram and Dimension 2.2. Cable-to-Board Connection 2.3. Pin Description 2.4. Operating Conditions 2.5. Power Requirements 2.6. RoHS Compliance
3. Using the Intel® FPGA Download Cable x
3.1. Installing the Intel® FPGA Download Cable Driver on Windows 3.2. Installing the Intel® FPGA Download Cable Driver on Linux 3.3. Setting up the Intel® FPGA Download Cable Hardware in the Intel® Quartus® Prime Software 3.4. Connecting the Intel® FPGA Download Cable to the Board
3.2. Installing the Intel® FPGA Download Cable Driver on Linux x
3.2.1. Installing on Red Hat Enterprise 4 or Earlier Versions 3.2.2. Installing on Red Hat Enterprise Linux 6
A. Additional Information x
A.1. Windows Troubleshooting Procedure for Intel® FPGA Download Cable A.2. Troubleshooting Procedure for Error when scanning hardware - No Devices
A.1. Windows Troubleshooting Procedure for Intel® FPGA Download Cable x
A.1.1. Jtagconfig version setting ( Intel® Quartus® Prime software root directory setting) A.1.2. Jtagserver Setting A.1.3. Install/Reinstall the Intel® FPGA Download Cable driver
A.1.1. Jtagconfig version setting ( Intel® Quartus® Prime software root directory setting) x
A.1.1.1. Automatic Setting A.1.1.2. Manual Setting
1. Introduction to Intel® FPGA Download Cable
2. Specifications for Intel® FPGA Download Cable
3. Using the Intel® FPGA Download Cable
A. Additional Information
B. Document Revision History for the Intel® FPGA Download Cable User Guide

2.2. Cable-to-Board Connection

The Intel® FPGA Download Cable has a 10-pin female connector, which plugs into a 10-pin male header on the device board. The male header consists of two rows of five pins, which are connected to the programming or configuration pins of the device.

A 10-pin surface mount header can be used for the JTAG, AS, or PS download cable. However, Intel® recommends using a through-hole connector because of the repeated insertion and removal force needed.

Figure 3. Connectors and Dimensions
Level Two Title