SDI II Intel® FPGA IP User Guide

ID 683133
Date 4/09/2024
Public
Document Table of Contents

5.4.6.2. YCbCr 444 Pixel Packing

The Intel FPGA Streaming Video Protocol specifies a packing scheme for YCbCr 444 pixels.

YCbCr pixels are always packed with Cb as the least significant symbol, then the Y symbol and then the Cr symbol. The following figure illustrates the 12 bits YCbCr 444 video packet transported over AXI4-Stream Video interface configured at Bits per color sample parameter set to 12 bits. In this example, each pixel (36 bits) does not perfectly fill a given number of bytes, hence additional 4 undefined bits are padded at the most significant bits of each pixel.

Figure 37. 12 Bits YCbCr 444 Video Packet When Parameter Bits Per Color Sample = 12

The following figure illustrates the 10 bits YCbCr 444 video packet transported over AXI4-Stream Video interface configured at IP parameter Bits per color sample parameter set to 12 bits. The active bits per color sample is less than the compile time parameter, hence the 2 least significant bits for each color sample are padded with zero.

Figure 38. 10 Bits YCbCr 444 Video Packet When Parameter Bits Per Color Sample = 12

The following figure illustrates the 10 bits YCbCr 444 video packet transported over AXI4-Stream Video interface configured at IP parameter Bits per color sample parameter set to 10 bits. Each pixel (30 bits) does not perfectly fill a given number of bytes, hence additional 2 undefined bits are padded at the most significant bits of each pixel.

Figure 39. 10 Bits YCbCr 444 Video Packet When Parameter Bits Per Color Sample = 10