External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 3/28/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.11.1. Enabling the Efficiency Monitor in a Design Example

To enable the Efficiency Monitor, follow these steps.
In the Performance group on the Diagnostics tab in the parameter editor, set Efficiency Monitor Mode to one of the following values:
  • Export: Allows you to connect your own RTL logic to control the Efficiency Monitor and read status registers.
  • Interface to Efficiency Monitor Toolkit: Allows use of the Unified Toolkit graphical user interface (in the System Console). Refer to Opening the Efficiency Monitor Toolkit for more information.
Figure 219. Efficiency Monitor Mode Setting