AN 889: 8K DisplayPort Video Format Conversion Design Example

ID 683547
Date 5/30/2018
Public

Software Description

The 8K DisplayPort Video Format Conversion Design Example includes IP from the Intel Video and Image Processing Suite and the DisplayPort interface IP

All these IPs can process frames of data without any further intervention when setup correctly. You must implement external high-level control to setup the IPs to begin with and when the system changes, e.g. DisplayPort receiver or transmitter hot-plug events or user push button activity. In this design, a Nios II processor, running bespoke control software, provides the high-level control.

At startup the software:

  • Sets the DDR4 ref clock to 150 MHz to allow for 1200 MHz DDR speed, then resets external memory interface IP to recalibrate on the new reference clock.
  • Sets up the PS8460 DisplayPort repeater and retimer.
  • Initializes the DisplayPort receiver and transmitter interfaces.
  • Initializes the processing pipeline IPs.

When initialization is complete the software enters a continuous while loop, checking for, and reacting to, a number of events.

Changes to the Scaling Mode

The design supports three basic scaling modes; passthrough, upscale, and downscale. In passthrough mode the design does no scaling of the input video, in upscale mode the design upscales input video, and in downscale mode the design downscales input video.

The four blocks in the processing pipeline; the Clipper, the downscaler, the upscaler and the Mixer determine the presentation of the final output in each mode. The software controls the settings of each block depending on the current input resolution, output resolution, and the scaling mode that you select. In most cases, the Clipper passes the input through unaltered, and the Mixer background size is the same size as the final, scaled version of the input video. However, if the input video resolution is greater than the output size, it is not possible to apply an upscale to the input video without first clipping it. If the input resolution is less than the output the software cannot apply a downscale without applying a Mixer background layer that is larger than the input video layer, which adds black bars around the output video.

Table 4.  Processing Block PipelinesThis table lists the action of the four processing pipeline blocks in each of the nine combinations of scaling mode, input resolution and output resolution.
Mode in > out in = out in < out
Passthrough

Clip to output size

No downscale

No upscale

No black border

No clip

No downscale

No upscale

No black border

No clip

No downscale

No upscale

Black border pads to output size

Upscale

Clip to 2/3 output size

No downscale

Upscale to output size

No black border

Clip to 2/3 output size

No downscale

Upscale to output size

No black border

No clip

No downscale

Upscale to output size

No black border

Downscale

No clip

Downscale to output size

No upscale

No black border

No clip

Downscale to output size

No upscale

No black border

No clip

Downscale to 2/3 input size

No upscale

Black border pads to output size

Change between modes by pressing user push button 1. The software monitors the values on the push buttons on each run through the loop (it does a software debounce) and configures the IPs in the processing pipeline appropriately.

Changes at the DisplayPort Input

On each run through the loop the software polls the status of the Clocked Video Input, looking for changes in the stability of the input video stream. The software considers the video is stable if:

  • The Clocked Video Input reports that the clocked video is successfully locked.
  • The input resolution and color space has no changes since the previous run through the loop.

If the input was stable but it has lost lock or the properties of the video stream have changed, the software stops the Clocked Video Input sending video through the pipeline. It also sets the Mixer to stop displaying the input video layer. The output remains active (showing a black screen and the Intel logo) during any receiver hot-plug events or resolution changes.

If the input was not stable but is now stable, the software configures the pipeline to display the new input resolution and color space, it restarts the output from the CVI, and it sets the Mixer to display the input video layer again. The re-enabling of the mixer layer is not immediate as the Frame Buffer may still be repeating old frames from a previous input and the design must clear these frames. Then you can re-enable the display to avoid glitching. The frame buffer keeps a count of the number of frames read from the DDR4, which the Nios II processor can read. The software samples this count when the input becomes stable and re-enables the Mixer layer when the count has increased by four frames, which ensures the design flushes out any old frames from the buffer.

DisplayPort transmitter Hot-plug Events

Hot-plug events at the DisplayPort transmitter fire an interrupt within the software that sets a flag to alert the main software loop of a change in the output. When the design detects a transmitter hot plug, the software reads the EDID for the new display to determine which resolutions and color spaces its supports. If you set the DIP switches to a mode that the new display cannot support, the software falls back to a less demanding display mode. It then configures the pipeline, DisplayPort transmitter IP, and the Si5338 part that is generating the transmitter vid_clk for the new output mode. When the input sees changes, the Mixer layer for the input video does not display as the software edits settings for the pipeline. The software does not re-enable the display until after four frames when the new settings pass through the frame buffer.

Changes to User DIP Switch Settings

The positions of user DIP switches 2 to 6 control the output format (resolution, frame rate, color space and bits per color) driven through the DisplayPort transmitter. When the software detects changes on these DIP switches, it runs through a sequence that is virtually identical to a transmitter hot plug. You need not query the transmitter EDID as it does not change.