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Setting up the Hardware
Figure 2. Intel® Cyclone® 10 GX FPGA Development Kit and Nextera 12G SDI FMC Daughter Card
For the hardware setup to run the reference design, follow these steps:
- Connect the Nextera 12G SDI FMC daughter card to the FMC port on the Intel® Cyclone® 10 GX FPGA Development Kit. For more information, refer to the Intel® Cyclone® 10 GX FPGA Development Kit and Nextera 12G SDI FMC Daughter Card figure.
- Set the remaining DIP switches to the default factory settings. For more information, refer to the DIP Switch Settings table in the Intel® Cyclone® 10 GX FPGA Development Kit User Guide.
- Connect the Nextera daughter card BNC RX connector (J1/12G IN) to the SDI Signal Generator and the Nextera daughter card BNC TX connector (J2/12G OUT) to the SDI Signal Analyzer.
- Connect the USB cable to the Micro USB Blaster connector on the development kit.
- Connect the power adapter (packaged together with the development board) to the power supply jack.
- Turn on the power for the Intel® Cyclone® 10 GX FPGA Development Kit. The hardware system is now ready for programming.
- Complete the following steps to configure the output clock frequencies of the programmable clock generator (Si5332) used in the reference design:
- Download and unzip the Kit Collateral.zip design package from the Intel® Cyclone® 10 GX FPGA Development Kit web page.
- Launch the Intel® Quartus® Prime Pro Edition software and then run the Clock Controller.exe application from the cyclone-10-gx-kit-collateral\examples\board_test_system directory.
- Set the OUT1 frequency to 148.5 MHz and the OUT6 frequency to 125 MHz on the Si5332(U64) tab. For more information, refer to the Clock Controller GUI for Si5332 figure.
- Close the Clock Controller application.
Figure 3. Clock Controller GUI for Si5332
- To switch between the fractional frame rate and integer frame rate video formats, follow these steps:
- Change the jumper (J8) position on the Nextera 12G-SDI FMC daughter card based on the setting in the Jumper Settings for Switching between PAL and NTSC. For more information, refer to the Jumper Settings on the Nextera 12G-SDI FMC Daughter Card figure.
- Press the push button (PB1) on the Intel® Cyclone® 10 GX FPGA Development Kit to trigger a power cycle to the LMK03328 on the Nextera 12G-SDI FMC daughter card every time you change the jumper (J8) position.
Figure 4. Jumper Settings on the Nextera 12G-SDI FMC Daughter Card
Table 2. Jumper Settings for Switching between PAL and NTSC Jumper Block Setting Description J7 — Programming header. J8 - 1–2 for PAL
- 2–3 for NTSC
To switch frequency between PAL and NTSC for the TX channel:
- Pin 1–2 = 297 MHz
- Pin 2–3 = 297/1.001 MHz
J9 1–2 To select the SDI or IP mode:
- Pin 1–2 = SDI mode
- Pin 2–3 = IP mode