AN 944: Thermal Modeling for Intel® Agilex™ FPGAs with the Intel® FPGA Power and Thermal Calculator

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ID 683810
Date 3/29/2021
Public
Document Table of Contents
Document Table of Contents x
1. List of Abbreviations 2. Introduction 3. Intel® Agilex™ FPGA Package Mechanical Design 4. Intel® Agilex™ FPGA Thermal Design Parameters 5. Thermal Design Process for Intel® Agilex™ Devices 6. Power and Thermal Calculator (PTC) for Intel® Agilex™ Devices 7. Example 2—Alternative Method of Analyzing Thermal Design 8. Document Revision History for AN 944: Thermal Modeling for Intel® Agilex™ FPGAs with the Intel® FPGA Power and Thermal Calculator
3. Intel® Agilex™ FPGA Package Mechanical Design x
3.1. Intel® Agilex™ Physical Package Structure
4. Intel® Agilex™ FPGA Thermal Design Parameters x
4.1. Intel® Agilex™ Compact Thermal Model (CTM) 4.2. Intel® Agilex™ Temperature Sensing 4.3. Thermal Sensor Accuracy
5. Thermal Design Process for Intel® Agilex™ Devices x
5.1. Thermal Parameter Dependencies and Accuracy
6. Power and Thermal Calculator (PTC) for Intel® Agilex™ Devices x
6.1. Device Selection and Analysis Example 6.2. Logic Design Information 6.3. Thermal Page and Thermal Design Parameters 6.4. CTM Model 6.5. Heat Sink 6.6. CFD Model
7. Example 2—Alternative Method of Analyzing Thermal Design x
7.1. Example 2—Full Length 1 Slot PCIe with 2 FPGAs 7.2. Thermal Design Optimization
1. List of Abbreviations
2. Introduction
3. Intel® Agilex™ FPGA Package Mechanical Design
4. Intel® Agilex™ FPGA Thermal Design Parameters
5. Thermal Design Process for Intel® Agilex™ Devices
6. Power and Thermal Calculator (PTC) for Intel® Agilex™ Devices
7. Example 2—Alternative Method of Analyzing Thermal Design
8. Document Revision History for AN 944: Thermal Modeling for Intel® Agilex™ FPGAs with the Intel® FPGA Power and Thermal Calculator

4.2. Intel® Agilex™ Temperature Sensing

Each die in an Intel® Agilex™ FPGA contains at least one digital thermal sensor (DTS) and one temperature sensing diode (TSD). Each DTS has no physical connection to device pins and must be read using temperature sensing software.

The TSDs connect to pins on the FPGA, to which you must connect an external temperature-reading device, such as the Maxim Integrated Max6581, Max 31730, or Texas Instrument TMP468. Both the DTS and TSD report the temperature of their physical location on the die, which may or may not be the hottest location on the die. For this reason, the Intel® FPGA Power and Thermal Calculator (PTC) reports the maximum temperature that each die should be reporting for the method used.

Note: Intel recommends using DTS. Thermal diode measurements are not validated by Intel, and must be validated by you if you choose to use them. Ensure that you read the latest application note on the diode measurement.

For example, given a device with two transceiver dies, the PTC would report temperatures like those in the table below. The reported temperatures are not the maximum temperatures for any of the dies; however, if the reported values exceed these values, it indicates that the cooling is not as expected, and the case temperature is likely to exceed the target (80°C, in this case). Temperatures exceeding these values also indicate that the operating power consumption is beyond what the PTC is showing—probably due to insufficient cooling.

Table 3.  PTC Temperature Report Format
Monitor Temperature Target (°C) (for example only)
Location Sensor
Case dts01 1 80
FPGA Core dts11 85
FPGA Core tds12 83
FPGA Core tds2 90
FPGA Core dts1 88
HSS_0_0 tds1 92
HSS_0_0 dts1 90
HSS_0_1 tds1 88
HSS_0_1 dts1 90
  • 1 Can be read only if a thermocouple is embedded in the case. Usually this method is used for verification during system design.
  • 2 External pinned-out sensor read using an external device.
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