AN 693: Remote Hardware Debugging over TCP/IP for Altera SoC

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ID 723698
Date 5/11/2015
Public
Document Table of Contents
Document Table of Contents x
1. Remote Hardware Debugging over TCP/IP for Altera SoC
1. Remote Hardware Debugging over TCP/IP for Altera SoC x
1.1. TCP/IP Communication Channel 1.2. Use-Case Scenarios 1.3. Software Requirements 1.4. Hardware Requirements 1.5. System Components 1.6. How to Remote Debug with the SignalTap II Logic Analyzer 1.7. Appendix 1.8. Document Revision History
1.5. System Components x
1.5.1. The Processor 1.5.2. SLD Hub Controller 1.5.3. SLD Hub
1.5.3. SLD Hub x
1.5.3.1. Supported System Debugging Tools
1.6. How to Remote Debug with the SignalTap II Logic Analyzer x
1.6.1. Example Implementation of Remote Debugging on an Altera SoC (5CSXSoC)
1. Remote Hardware Debugging over TCP/IP for Altera SoC

1.2. Use-Case Scenarios

Why would you use this feature?
  • To debug a device when you cannot access the JTAG connections (due to mechanical restrictions or regulatory restrictions).
  • To debug a device remotely, such as at a customer site.
  • In a team-based situation with several people working on a single device.
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