Intel® High Level Synthesis Compiler Pro Edition: Best Practices Guide

ID 683152
Date 10/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.1. Balancing Target fMAX and Target II

The compiler attempts to optimize the component for different objectives for the scheduled fMAX depending on whether the fMAX target is set and whether the #pragma II is set for each of the loops.

The fMAX target is a strong suggestion and the compiler does not error out if it is not able to achieve this fMAX, whereas the #pragma II triggers an error if the compiler cannot achieve the requested II. The fMAX achieved for each block of code is shown in the Loops report.

The following table outlines the behavior of the scheduler in the Intel® HLS Compiler:

Explicitly Specify fMAX? Explicitly Specify II? Compiler Behavior
No No Use heuristic to achieve best fMAX/II trade-off.
No Yes Best effort to achieve the II for the corresponding loop (may not achieve the best possible fMAX).
Yes No Best effort to achieve fMAX specified (may not achieve the best possible II).
Yes Yes Best effort to achieve the fMAX specified at the given II. The compiler errors out if it cannot achieve the requested II.
Note: If you are using an fMAX target in the command line or for a component, use #pragma II = <N> for performance-critical loops in your design.