DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 10/16/2023
Public
Document Table of Contents

10.10.2.6. VIDEO_MODE_F0_LINE_COUNT (0x56)

Table 141.  VIDEO_MODE_F0_LINE_COUNT (0x56)
Name Bit(s) Access Description Reset
Reserved 31:16
F0 line count 15:0 RW Specifies the active picture height of progressive video or interlaced video field 0. 0x0