Cyclone® 10 LP Device Overview

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ID 683879
Date 5/27/2022
Public
Document Table of Contents
Document Table of Contents x
Intel® Cyclone® 10 LP Device Overview
Intel® Cyclone® 10 LP Device Overview x
Summary of Intel® Cyclone® 10 LP Features Intel® Cyclone® 10 LP Available Options Intel® Cyclone® 10 LP Maximum Resources Intel® Cyclone® 10 LP Package Plan Intel® Cyclone® 10 LP I/O Vertical Migration Logic Elements and Logic Array Blocks Embedded Multipliers Embedded Memory Blocks Clocking and PLL FPGA General Purpose I/O Configuration Power Management Document Revision History for Intel® Cyclone® 10 LP Device Overview
Intel® Cyclone® 10 LP Device Overview

Document Revision History for Intel® Cyclone® 10 LP Device Overview

Document Version Changes
2022.05.27 Removed instances of Enpirion from the Power Management section.
2020.05.21 At the package plan table, added description and related information links that explain how the GPIO and LVDS pins are counted.
2019.12.30 Added related information link to the Extended Temperature Device Support page that provides a list of devices that support the extended temperature range, their operational speed grade, and related Intel® Quartus® Prime settings for timing analysis.
Date Version Changes
May 2017 2017.05.08 Initial release.
Level Two Title