DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 11/12/2021
Public

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11.5.3. DPRX0_AUD_AIF0

Received audio InfoFrame register, DPRX0_AUD_AIF0.

Address: 0×0032

Direction: RO

Reset: 0×00000000

Table 150.  DPRX0_AUD_AIF0 Bits

Bit

Bit Name

Function

31:8

Unused

7:0

AIF

Received audio InfoFrame byte 0 (refer to CEA-861-E specification)