DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 1/24/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.7.7. DPRX0_AUD_AIF4

Received audio InfoFrame register, DPRX0_AUD_AIF4.

Address: 0×0036

Direction: R0

Reset: 0×00000000

Table 165.  DPRX0_AUD_AIF4 Bits

Bit

Bit Name

Function

31:8

Unused

7:0

AIF

Received audio InfoFrame byte 4 (refer to CEA-861-E specification)