AN 485: Serial Peripheral Interface Master in Altera MAX Series

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ID 683277
Date 9/22/2014
Public
Document Table of Contents
Document Table of Contents x
1. Serial Peripheral Interface Master in Altera MAX Series
1. Serial Peripheral Interface Master in Altera MAX Series x
1.1. Using SPI Master in Altera Devices 1.2. Implementation 1.3. Acknowledgments 1.4. Document Revision History
1.1. Using SPI Master in Altera Devices x
1.1.1. SPI Interface 1.1.2. Host Interface
1.2. Implementation x
1.2.1. Source Code
1. Serial Peripheral Interface Master in Altera MAX Series

1.2. Implementation

These designs may be implemented using MAX II, MAX V, and MAX 10 devices. The provided design source codes target the MAX II (EPM240) and MAX 10 (10M08) respectively. These design source codes are compiled and can be programmed directly to the MAX devices.


Section Content
Source Code

Level Two Title