Quartus® Prime Standard Edition User Guide: Design Compilation

ID 683283
Date 10/22/2021
Public
Document Table of Contents

3.2.1.4.1. Setting a Verilog HDL Macro Default Value in the Quartus® Prime Software

To specify a macro in the Quartus® Prime software, follow these steps:
  1. Click Assignments > Settings > Compiler Settings > Verilog HDL Input
  2. Under Verilog HDL macro, type the macro name in the Name box and the value in the Setting box.
  3. Click Add.