HDMI Intel® FPGA IP User Guide

ID 683798
Date 12/04/2023
Public
Document Table of Contents

9.2.2.21. VIDEO_MODE_HORIZONTAL_SYNC_POLARITY (0x6B)

Table 121.  VIDEO_MODE_HORIZONTAL_SYNC_POLARITY (0x6B)
Name Bit(s) Access Description Reset
Reserved 31:1
Video mode horizontal sync polarity 0 RW
  • Set to 1 for positive horizontal sync polarity.
  • Set to 0 for negative horizontal sync polarity.
0x0