F-Tile Low Latency 100G Ethernet Intel® FPGA IP User Guide

ID 792946
Date 12/04/2023
Public
Document Table of Contents

5.1.3. F-Tile Low Latency 100G Ethernet Intel® FPGA IP Core RX MAC Datapath

The RX MAC receives Ethernet frames and forwards the payload with relevant header bytes to the client after performing some MAC functions on header bytes. The RX MAC processes all incoming valid frames.

Figure 10. Flow of Client Frame With Preamble Pass-Through Turned On This figure uses the following notational conventions:
  • <p> = payload size, which is arbitrarily large.
  • <s> = number of padding bytes (0–46).
Figure 11. Flow of Client Frame With Preamble Pass-Through Turned Off This figure uses the following notational conventions:
  • <p> = payload size, which is arbitrarily large.
  • <s> = number of padding bytes (0–46).
Figure 12. RX MAC Datapath