AN 447: Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems

ID 683295
Date 3/28/2022
Public

Example of Determining Series Termination Resistor Value

This example shows how to determine the value of the series termination resistor to manage the voltage overshoot effectively. The example uses the terminator wizard feature in the HyperLynx* simulation software by Siemens* EDA. You can explore other appropriate methods via simulation to determine a suitable series resistor value for your interface.

In this example, an Intel® FPGA with 3.3-V LVTTL 16 mA output is driven to a Cyclone® III 2.5-V LVTTL input. You can disable the diode and apply the series termination, or use the driver selection reference.

Figure 5.  Intel® FPGA 3.3 V LVTTL 16 mA Interfacing with Cyclone® III 2.5 V LVTTLSet up the desired interface in the Schematic Editor as represented in this figure and run the terminator wizard.


Figure 6. Terminator Wizard Results From HyperLynx Simulation Software by Siemens* EDA The Terminator Wizard results suggest adding a 33 Ω series resistance.


Figure 7.  Intel® FPGA 3.3 V LVTTL 16 mA Interfacing with Cyclone® III 2.5 V LVTTL with Recommended 33.0 Ω Series Termination ResistorThe suggested 33 Ω series resistance is applied close to the Intel® FPGA driver.


Figure 8. Simulation Waveforms Comparing Terminated and Non-Terminated Interface Across Typical, Minimum, and Maximum ConditionsThe new setup in this example is evaluated at different allowable conditions to ensure that DC and AC specifications are met and to identify the impact of introducing the resistor in the interface.