Arria® V Device Handbook: Volume 2: Transceivers

ID 683573
Date 5/29/2020
Public
Document Table of Contents

6.5.4. CPRI and OBSAI

Use the deterministic latency functional mode to implement protocols such as CPRI and OBSAI.

The CPRI interface defines a digital point-to-point interface between the Radio Equipment Control (REC) and the Radio Equipment (RE), allowing flexibility in either co-locating the REC and the RE, or a remote location of the RE.

Figure 201. CPRI TopologiesIn most cases, CPRI links are between REC and RE modules or between two RE modules in a chain configuration.


If the destination for the high-speed serial data that leaves the REC is the first RE, it is a single-hop connection. If the serial data from the REC must traverse through multiple REs before reaching the destination RE, it is a multi-hop connection.

Remotely locating the RF transceiver from the main base station introduces a complexity with overall system delay. The CPRI specification requires that the accuracy of measurement of roundtrip delay on single-hop and multi-hop connections be within ±16.276 ns to properly estimate the cable delay.

For a single-hop system, this allows a variation in roundtrip delay of up to ±16.276 ns. However, for multi-hop systems, the allowed delay variation is divided among the number of hops in the connection—typically, equal to ±16.276 ns/(the number of hops) but not always equally divided among the hops.

Deterministic latency on a CPRI link also enables highly accurate triangulation of the location of the caller.

OBSAI was established by several OEMs to develop a set of specifications that can be used for configuring and connecting common modules into base transceiver stations (BTS).

The BTS has four main modules:

  • Radio frequency (RF)
  • Baseband
  • Control
  • Transport

In a typical BTS, the radio frequency module (RFM) receives signals using portable devices and converts the signals to digital data. The baseband module processes the encoded signal and brings it back to the baseband before transmitting it to the terrestrial network using the transport module. A control module maintains the coordination between these three functions.

Figure 202. Example of the OBSAI BTS Architecture


Using the deterministic latency option, you can implement the CPRI data rates in the following modes:

  • Single-width mode—with 8/10-bit channel width
  • Double-width mode—with 16/20-bit channel width
Table 82.  Sample Channel Width Options for Supported Serial Data Rates
Serial Data Rate (Mbps) Channel Width (FPGA-PCS Fabric)
Single Width Double-Width
8-Bit 16-Bit 16-Bit 32-Bit
614.4 Yes Yes
1228.8 Yes Yes Yes Yes
2457.6 Yes Yes Yes
3072 Yes Yes Yes
4915.2 Yes
6144 Yes
9800 39 40 Yes
39 The Arria V GZ Standard PCS can support up to 9.9 Gbps datarates in Deterministic Latency configuration or up to 9.8 Gbps in Custom and Low Latency configurations.
40 Applicable to C3 and I3L speed grades only.