AN 773: Drive-On-Chip Design Example for Intel® MAX® 10 Devices

ID 683072
Date 7/26/2023
Public
Document Table of Contents

5.3. Scale Factors for the Drive-on-Chip Design Example in the System Console Toolkit

The design applies scale factors to signals in the system console toolkit for diagnostic display in human readable, physical units (e.g. volts, amps).
Table 8.  Scale Factors in System ConsoleThis table shows the scale factors that the GUI uses, based on the scaling of the motor phase currents as in Scaling of Motor Phase Current Samples.
Item Sigma Delta Scaling MAX 10 Scaling
Motor Phase Voltages 545 counts/A 67.7 counts/V
DC Bus Voltage 545 counts/V 67.7 counts/V
Input Voltage 895 counts/V 223 counts/V
Input Current 252 counts/A N/A
Inductor Current 717 counts/A 57.3 counts/A
DC Bus Current 1638 counts/A N/A
Motor Phase Currents 1.024 counts/mA 1.024 counts/mA
Table 9.  Scale Factors for Id and Iq in System ConsoleThe table shows that scaling of Id (requested and actual) and Iq (requested and actual) in the GUI is the same as the motor phase current scaling
Item Sigma Delta Scaling (counts/mA) MAX 10 Scaling (counts/mA)
Id Direct Current 1.024 1.024
Iq Quadrature Current 1.024 1.024

SVM Voltage

The design calculates the maximum count of the PWM from the PWM clock frequency, and passes it to the software from the system.h header file generated with the Nios II BSP . The maximum count varies with the PWM clock frequency and sample rate and is (PWM frequency in Hz)/( (Sample rate) *1000). For example, with a PWM clock frequency of 300 MHz and a sample rate of 16 kHz the maximum count is 18,750.

Voltage demand signals for the PWM IP have a full-scale value equal to the maximum count, so setting the voltage demand to the maximum count value achieves 100% duty cycle and 100% of DC link voltage. Setting the voltage demand to 0 achieves 0% duty cycle and 0% of the DC link voltage. By convention, voltages for display purposes are centred around 0. For example, if the DC link voltage is 48 V voltage demand signals between 0 and maximum count map to 0 to +48 V outputs, but these signals are offset and show in System Console as -24 V to +24 V.

Using the above example of 300 MHz PWM and 16 kHz sample rate for the Tandem Motion-Power 48 V Board, in System Console :

Offset 18,750/2 = 9,375

Scaling 9,375/24 = 391