Arria V Hard Processor System Technical Reference Manual

ID 683011
Date 12/02/2022
Public
Document Table of Contents

3.3.1.2. FREF, FVCO, and FOUT Equations

Figure 5. PLL Block Diagram

Values listed for M, N, and C are actually one greater than the values stored in the CSRs.


FREF = FIN / N
FVCO = FREF × M = FIN × M/N
FOUT = FVCO / (Ci × K) = FREF × M/ (Ci× K) = (FIN × M)/ (N × Ci × K)
Table 6.  FREF, FVCO, and FOUT Equation variables
Variable Value Description
FVC = VCO frequency -
FIN = Input frequency -
FREF = Reference frequency -

Ci

= Post-scale counter i is 0-5 for each of the six counters
K = Internal post-scale counter in main PLL reset values are K = 2 for C0 K=4 for C1 and C2
M = numer + 1 Part of clock feedback path. VCO register is used to program M value.

(Range 1 to 4096)

N = denom + 1 Part of input clock path. VCO register is used to program N value.

(Range 0 to 64)

Note: The reset values of numer and denom are 1 so that at reset, the M value is 2 and the N value is 2.

The vco register is used to program the M and N values. In the table below you can see which sections of the vco bit field are used to set the values of M and N.

Table 7.  VCO Register
Name Bit Reset Range Description
numer 3:15 0x1 0 to 4095 Numerator in VCO output frequency equation.
Note: Bit 15 reserved.
denom 16:21 0x1 0 to 63 Denominator in VCO output frequency equation.

Unused clock outputs should be set to a safe frequency such as 50 MHz to reduce power consumption and improve system stability.